Physical Design Engineer (VLSI) Jobs in Chennai Embedded Systems and Firmware Company

📋 Job Description

Jobzi is sourcing qualified candidates for Physical Design Engineer (VLSI) positions in Chennai's private Embedded Systems and Firmware Company sector. This is a full-time opportunity with a reputed Embedded Systems and VLSI employer in Chennai offering competitive salary, structured growth, and a professional work environment. Tamil communication skills are preferred alongside English for professional and business interaction in Chennai.

📌 Key Responsibilities

• Perform floorplanning, power planning, and placement for standard cell designs in Cadence Innovus
• Run clock tree synthesis and meet skew and insertion delay targets
• Execute routing and resolve DRC violations for sub-10nm process nodes
• Perform static timing analysis using Cadence Tempus and sign-off with timing closure
• Conduct IR drop and electromigration analysis using Voltus or equivalent tools
• Run DRC and LVS using Cadence Virtuoso or Mentor Calibre and resolve violations
• Support ECO (Engineering Change Order) flow for post-silicon or mask-change corrections

🎓 Qualifications and Requirements

• How do you approach power grid design for a block with 500mA peak current demand?
• What is the difference between setup and hold slack and how do you fix a hold violation?
• Describe your experience with clock tree synthesis for a 500MHz design with gated clocks.
• How do you handle antenna violations during routing in a deep sub-micron process?
• What strategies do you use to improve IR drop in a hot-spot region of the layout?
• Have you worked with Cadence Innovus for an advanced node (7nm or 5nm) tapeout?
• How do you create and validate SDC constraints for a multi-clock domain design?
• Good Tamil and English communication skills for team coordination and client interaction in Chennai.

✅ Required Skills